State-backed chipmakers have been trying to push the limit of ASML’s older deep ultraviolet lithography machines, the Dutch supplier’s second-best lineup (after EUVs), with the so-called quadruple patterning technique.
That requires lithographic machines to perform up to four exposures on a silicon wafer, with a total margin of error of no wider than hundredths the diameter of a human hair. Compared to EUV lithography, the multi-patterning technique with DUVs is not only resource-intensive but also prone to alignment errors and yield losses, according to Ying-Wu Liu, an analyst at research firm Yole Group.
That effort isn’t going well because of subpar local gear used in conjunction with ASML’s DUV systems, according to one of the people. On at least one trial production line, engineers have been forced to replace Chinese gear with foreign equipment to ensure reasonable output, the person said.
“Multi-patterning inherently introduces more process steps, increasing the risk of defects and variability,” Liu said. “Additionally, the higher complexity and cost of multi-patterning make it less economically viable for high-volume production of advanced nodes like 5nm.”
I was always skeptical about China’s 7nm fab process. It did not seem economically viable.
What information? SMIC has been delivering 7nm chips for years.
The quadruple patterning approach does not seem viable even if they can deliver products with 7nm
Every single manufacturer (Samsung, TSMC, Intel) uses multiple patterning, it’s inevitable and in no way “not viable”. China’s problem is that they don’t have access to better equipment, so even multiple patterning techniques are not enough for good 5 nm.
I never claimed they haven’t been delivering 7 nm. I claimed that it didn’t seem viable and could be more of a state sanctioned push.
I am referring to this comment by Bloomberg:
Worse, Huawei’s main production partner, Semiconductor Manufacturing International Corp., is struggling to churn out even 7nm chips at steady volumes. The Shanghai-based firm’s 7nm production lines have been plagued by poor yield and reliability issues, according to another person. There’s little guarantee that Huawei will be able to secure enough smartphone processors and AI chips in coming years, the person added.
Which is further by a more context:
State-backed chipmakers have been trying to push the limit of ASML’s older deep ultraviolet lithography machines, the Dutch supplier’s second-best lineup (after EUVs), with the so-called quadruple patterning technique.
That requires lithographic machines to perform up to four exposures on a silicon wafer, with a total margin of error of no wider than hundredths the diameter of a human hair. Compared to EUV lithography, the multi-patterning technique with DUVs is not only resource-intensive but also prone to alignment errors and yield losses, according to Ying-Wu Liu, an analyst at research firm Yole Group.
Worse, Huawei’s main production partner, Semiconductor Manufacturing International Corp., is struggling to churn out even 7nm chips at steady volumes. The Shanghai-based firm’s 7nm production lines have been plagued by poor yield and reliability issues, according to another person. There’s little guarantee that Huawei will be able to secure enough smartphone processors and AI chips in coming years, the person added.
That quote is disproven by the fact that you can order Huawei phones which contain 7nm chips. If they weren’t “able to secure enough smartphone processors” the phones would be sold out, as they couldn’t produce enough. You can call that low demand or whatever, but it seems obvious that they can produce enough 7nm chips to satisfy their customer needs.
State-backed chipmakers have been trying to push the limit of ASML’s older deep ultraviolet lithography machines, the Dutch supplier’s second-best lineup (after EUVs), with the so-called quadruple patterning technique.
That requires lithographic machines to perform up to four exposures on a silicon wafer, with a total margin of error of no wider than hundredths the diameter of a human hair. Compared to EUV lithography, the multi-patterning technique with DUVs is not only resource-intensive but also prone to alignment errors and yield losses, according to Ying-Wu Liu, an analyst at research firm Yole Group.
Yes, multiple patterning techniques are not the most efficient, but they are pretty much required to work with these sizes. This is proven by the fact that every single company that makes 7nm and lower makes use of multiple patterning (TSMC, Samsung, Intel). Huawei’s problem is that they have old ASML equipment (DUV), which is enough for their customer demands at 7nm, but starts showing its age at smaller nodes.
I was always skeptical about China’s 7nm fab process. It did not seem economically viable.
Their 7nm is fine, but it seems like their 5nm plans are over.
That’s not what the information implies.
The quadruple patterning approach does not seem viable even if they can deliver products with 7nm.
What information? SMIC has been delivering 7nm chips for years.
Every single manufacturer (Samsung, TSMC, Intel) uses multiple patterning, it’s inevitable and in no way “not viable”. China’s problem is that they don’t have access to better equipment, so even multiple patterning techniques are not enough for good 5 nm.
I never claimed they haven’t been delivering 7 nm. I claimed that it didn’t seem viable and could be more of a state sanctioned push.
I am referring to this comment by Bloomberg:
Which is further by a more context:
That quote is disproven by the fact that you can order Huawei phones which contain 7nm chips. If they weren’t “able to secure enough smartphone processors” the phones would be sold out, as they couldn’t produce enough. You can call that low demand or whatever, but it seems obvious that they can produce enough 7nm chips to satisfy their customer needs.
Yes, multiple patterning techniques are not the most efficient, but they are pretty much required to work with these sizes. This is proven by the fact that every single company that makes 7nm and lower makes use of multiple patterning (TSMC, Samsung, Intel). Huawei’s problem is that they have old ASML equipment (DUV), which is enough for their customer demands at 7nm, but starts showing its age at smaller nodes.
I think readers can make up their own minds with respect to the article and your claims.